1. Field of the Invention
The present invention relates to the field of semiconductor processing and more particularly to forming of metallic platinum zinc films by deposition on semiconductor devices.
2. Discussion of Related Art
Low resistance contact layers are commonly formed on gate, source, and drain regions of transistors and other microelectronic components to improve performance. An example of a low resistance contact layer is the self-aligned silicide layer, commonly referred to as salicide. Current metal deposition for salicide formation is accomplished by physical vapor deposition (PVD). However, the directional nature of the depositing flux in the PVD technique has drawbacks. These include the difficulty in depositing metal at the bottom of high aspect ratio features and the non-conformal metal deposition on three-dimensional (3D) features of 3D transistor structures. In addition, many deposited materials do not show a p-type work function in transistor and diode structures.